1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to the timing of memory circuits.
2. Description of the Related Art
In recent years, many integrated circuits (ICs) have been designed to include a number of power-saving features. For example, many IC's nowadays include circuitry coupled to receive an adjustable supply voltage. In times of increased performance demand, the supply voltage may be increased to support the desired performance level. In times of reduced performance demand, the supply voltage may be reduced in order to save power.
Changing the supply voltage may result in changes to the operational characteristics of that circuitry. One type of circuitry that may be affected by a changing supply voltage is on-chip memory circuitry. At higher supply voltages, certain types of memory circuitry may require less time to perform read operations. Conversely, when operating at lower supply voltages, additional time may be required to perform a read operation. In particular, the time to perform a read operation may be related to the time required for sense amplifiers in the memory to accurately reflect the stored data values in selected memory cells. Accordingly, IC's that include one or more on-chip memories may include additional circuitry that allows a sufficient amount of time to elapse from the beginning of a read cycle to the time that corresponding sense amplifiers may provide valid data. Such circuitry may need to be programmed to set an appropriate delay for a given operating point.